1. Field of the Invention
The invention relates to a transistor outline (TO) package which comprises a mounting space for an electronic component, in particular a hermetically-sealed housing for a laser diode.
2. Description of Related Art
Transistor outline packages, which are used for transceivers in a high-speed computer and telecommunication networks, are known.
In particular, the 10 Gigabit Small Form Factor Pluggable (XPF) is the dominating standard for high-speed networks. Such transceivers comprise a housing with electrical feedthroughs. Inside the housing there is an electronic component comprising a laser diode or photodiode which is coupled with the optical network.
A standard XPF transceiver does not have any integrated cooling capacity. Therefore, XPF transceivers require an external heatsink to ensure sufficient heat dissipation during normal operation.
In addition, the material and process to manufacture XFP headers are costly and complicated.
The document KR 1824922 B shows a transistor outline package which comprises an integrated thermoelectric cooler. The cooler is arranged on the inner surface of the base of the transistor outline package. Since the chip with a laser diode is arranged parallel to the inner surface of the base, a mirror is necessary to reflect the light to the window. In addition, the RF pins have to run along adjacent to the thermoelectric cooler which might result in losses.
The document US 2012/0051382 shows a thermoelectric cooler which is arranged on the base of the header resulting in similar disadvantages as described above.
Accordingly, it is an object of the invention to provide a compact, efficient transistor outline package which comprises an integrated thermoelectric cooler.